In power electronics for critical sectors — railway, defence, energy, digital infrastructure — the custom project does not allow the iterative cycle of the catalogue product. Production runs are short. Deadlines are contractually binding. The first prototype delivered to the customer is validated against the entire contract, not against a simplified preliminary version.

The consequence is structural: success at the first prototype is not a desirable goal, it is the condition that makes the business model work. When a railway customer needs a converter operating at −40 °C, or an AI application requires dissipating more than 700 W/cm² locally, the design cannot be closed “by eye”. Whether a project delivers at the first prototype or iterates three times is decided before the first PCB is manufactured.

The constraint that defines the sector

Typical production runs in custom railway or defence projects sit between 50 and 500 units. The product learning curve runs out before the cost of a partial redesign is covered, so the catalogue business model — amortising iteration over thousands of subsequent units — does not apply. Every deviation detected when validating the first prototype has three possible outcomes, all costly: redesign with replanning, acceptance of contractual penalties, or batch rejection with replacement.

The metric Premium SA uses internally to evaluate design-flow maturity is the first-pass approval rate of DVT (Design Verification Testing). When stages are shortened due to schedule pressure, the indicator drops rapidly and drags timelines and margins with it.

Four fault vectors, four models

Pre-hardware verification is structured in four layers covering the dominant fault vectors in power electronics.

Electrical modelling: SPICE, PLECS and Simulink

SPICE for detailed switching analysis, and PLECS or Simulink for full-system simulation, allow verification — before manufacturing the first PCB — that the closed loop is stable, that waveforms do not exceed semiconductor margins, and that losses are consistent with the available dissipation. For SiC or GaN topologies, accurately capturing packaging parasitic inductance is decisive: a use case of the European ALL2GaN research project has documented how TOLL versus PG-DSO-20 packaging conditions snubber sizing in 3 kW/48 V totem-pole rectifiers achieving 97.5% efficiency and 40 W/in³ density.

Thermal CFD simulation

From chip to system. Real density does not come from table coefficients. For local heat fluxes above 700 W/cm² in AI applications and current-generation OCP servers, integrated liquid microchannels with dielectric coolant, in fraction-of-a-millimetre channel geometries, are already production-ready technology.

EMC pre-compliance simulation

The chamber costs thousands of euros and calendar days; discovering a radiated-emissions failure with the product already wired is one of the most damaging scenarios in a custom project. Modern solvers allow prediction of compliance with CISPR 32, EN 50121-3-2 (railway) or MIL-STD-461 (defence) before manufacturing. The Premium SA criterion: a design margin of at least 6 dB with respect to the applicable limits.

MATLAB / Simulink for digital control

Verification of control-loop stability and automatic C code generation. For SIL2/SIL3 under EN 50128 or ASIL-B/C under ISO 26262, traceability between safety requirement, model and generated code is a normative requirement.

Beyond simulation: reliability by design and physical testing

Reliability is not only verified on the bench; it is designed. Quantitative reliability analysis — the D4R block in Premium SA’s D2x methodology — makes it possible to commit to contractual MTBF figures backed by model and evidence. Tools: Telcordia SR-332, MIL-HDBK-217F, Siemens SN29500 and FIDES, depending on the customer and sector; FMEA with quantitative RPN thresholds; FTA with PFH calculation for SIL3. We explain this approach in more depth in our white paper on reliability in critical power electronics.

Physical testing closes the loop: DVT on three units (all must pass without rework), HALT to identify operational and destructive margins, and HASS as a production filter for each manufactured unit. The HALT+HASS combination does not replace DVT; it complements it — DVT verifies the design, HALT identifies the margins and HASS ensures that each unit stays within them.

The first prototype as the threshold of the business model

The chain described — four layers of simulation, three quantitative reliability tools, two levels of accelerated testing, all structured by the D2x methodology with V-Model and quantitative stage-gates (D2W, D2F, D2C, D4R, D4Co) — is Premium SA’s operational answer to a structural constraint: the first prototype must work. The investment has a measurable return: every hour of correct modelling is an hour not spent — multiplied — on physical bring-up, production redesign or warranty.

For the customer engineer evaluating suppliers, the relevant question is not whether the supplier knows how to design; it is whether the supplier knows how to verify. In custom power electronics for critical sectors, this is not an efficiency improvement: it is the condition that sustains the project.

Normative references