White paper – GaN in a 1/16th Brick: 300 W DC/DC Conversion with Natural Convection
How enhancement-mode GaN switching and a CFD-optimised pin-fin heatsink let the NP-0847 1/16th-brick buck converter deliver 300 W with up to 98 % efficiency and no fan.
LIC, BBU and the 1–50 ms Window: Transient Management in the 800 V Sidecar
AI workloads create power steps in milliseconds. This note explains how LIC and BBU stages, SCMI power capping and converter telemetry manage the 1–50 ms window in the 800 V sidecar.
Engineering the Power Stack for AI Data Centers
Efficiency, power density and reliability define power for AI data centres. How mission-critical power electronics engineering addresses all three, from WBG stages to OCP ORv3 kits.
The Hyperscale Data Centre as a New MV Load
AI campuses are changing what DSOs see at the point of connection. The four measurable power-quality effects and the four-layer mitigation chain from the rack to the PCC.
Total Cost of Ownership (TCO) in Power Electronics: Why the Lowest Price Is Rarely the Best Decision
Unit price is only the tip of the iceberg. We break down the hidden costs of power converters, give a practical TCO formula and five questions to ask suppliers.
The First Prototype Admits No Second Chance
In custom power electronics for critical sectors, the first prototype must work. Why we simulate before soldering, and how the simulation and test chain makes it possible.
Manageable Power Converters: PMBus, Redfish and SCMI in the 800 VDC AI Data Centre
Which protocols link the data centre manager to the power converter, where PMBus, Redfish and SCMI fit, and what the converter firmware needs to provide.
Buyer’s Guide: Power Conversion Systems for Railway Applications
A practical guide for engineers and buyers on specifying and selecting EN 50155 power conversion equipment for rolling stock, including related standards, supplier questions and TCO.
FAESR and the New PCS Design Metric
Grid inertia, NC RfG 2.0 and FAESR are shifting the BESS PCS design metric from stored kWh to fast, stable sub-second response. What this means for European PCS design.
